MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2045

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Address:
Freescale Semiconductor, Inc.
Reset
Reset
ENAUTOSET_USBCLKS
HOST_FORCE_LS_SE0
Bit
Bit
W
W
R
R
UTMI_SUSPENDM
CLKGATE
31
15
1
0
SFTRST
RSVD3
Field
31
30
29
28
27
26
HW_USBPHY_CTRL
30
14
1
0
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Writing a 1 to this bit will soft-reset the HW_USBPHY_PWD, HW_USBPHY_TX,
HW_USBPHY_RX, and HW_USBPHY_CTRL registers.
Gate UTMI Clocks. Clear to 0 to run clocks. Set to 1 to gate clocks. Set this to save power while
the USB is not actively being used. Configuration state is kept while the clock is gated.
Note this bit can be auto-cleared if there is any wakeup event when USB is suspended while
ENAUTOCLR_CLKGATE bit of HW_USBPHY_CTRL is enabled.
Used by the PHY to indicate a powered-down state. If all the power-down bits in the
HW_USBPHY_PWD are enabled, UTMI_SUSPENDM will be 0, otherwise 1. UTMI_SUSPENDM
is negative logic, as required by the UTMI specification.
Forces the next FS packet that is transmitted to have a EOP with low-speed timing. This bit is
used in host mode for the resume sequence. After the packet is transferred, this bit is cleared.
The design can use this function to force the LS SE0 or use the
HW_USBPHY_CTRL_UTMI_SUSPENDM to trigger this event when leaving suspend. This bit
is used in conjunction with HW_USBPHY_DEBUG_HOST_RESUME_DEBUG.
Reserved.
Enables the feature to auto-clear the EN_USB_CLKS register bits in
HW_CLKCTRL_PLL1CTRL0/HW_CLKCTRL_PLL1CTRL1 if there is wakeup event on USB0/USB1
while USB0/USB1 is suspended.This should be enabled if needs to support auto wakeup without
S/W's interaction.
28
12
0
0
HW_USBPHY_CTRL field descriptions
8007_C000h base + 30h offset = 8007_C030h
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
23
0
0
7
Description
22
0
0
6
21
1
5
0
Chapter 32 Integrated USB 2.0 PHY
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
2045
16
0
0
0

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