MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 868

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
10.8.9 XTAL Clock Control Register (HW_CLKCTRL_XTAL)
The XTAL control register provides gating control for clocks sourced from the 24-MHz
XTAL clock domain.
HW_CLKCTRL_XTAL: 0x080
HW_CLKCTRL_XTAL_SET: 0x084
HW_CLKCTRL_XTAL_CLR: 0x088
HW_CLKCTRL_XTAL_TOG: 0x08C
This register controls various fixed-rate divider clocks working off the 24.0-MHz crystal
clock.
EXAMPLE
HW_CLKCTRL_XTAL_WR(BF_CLKCTRL_XTAL_UART_CLK_GATE(0)|BF_CLKCTRL_XTAL_DRI_CLK24M_GATE(1));
Address:
868
Reset
Reset
DIV_FRAC_EN
Bit
Bit
W
W
R
R
Field
9 0
DIV
10
31
15
0
0
HW_CLKCTRL_XTAL
30
14
1
0
1 = Enable fractional divide. 0 = Enable integer divide.
This field controls the CLK_X divide ratio. CLK_X is sourced from the 24-MHz XTAL through this divider.
Do NOT divide by 0.
29
13
1
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_CLKCTRL_XBUS field descriptions (continued)
28
12
RSRVD2
0
0
8004_0000h base + 80h offset = 8004_0080h
27
11
0
0
26
10
0
0
RSRVD1[15:2]
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
RSRVD1[25:16]
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
DIV_UART
17
0
0
1
16
0
1
0