MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 23

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
Freescale Semiconductor, Inc.
10.3
10.4
10.5
10.6
10.7
10.8
CLKCTRL Digital Clock Divider................................................................................................................................849
Clock Frequency Management.....................................................................................................................................852
Analog Clock Control...................................................................................................................................................853
CPU and EMI Clock Programming..............................................................................................................................853
Chip Reset.....................................................................................................................................................................854
Programmable Registers...............................................................................................................................................855
10.2.2
10.2.3
10.3.1
10.3.2
10.3.3
10.8.1
10.8.2
10.8.3
10.8.4
10.8.5
10.8.6
10.8.7
10.8.8
10.8.9
10.8.10
10.8.11
10.8.12
Logical Diagram of Clock Domains..........................................................................................................847
Clock Domain Description........................................................................................................................848
Integer Clock Divide Mode.......................................................................................................................850
Fractional Clock Divide Mode..................................................................................................................850
Gated Clock Divide Mode.........................................................................................................................852
System PLL0, System/USB0 PLL Control Register 0 (HW_CLKCTRLPLL0CTRL0)..........................856
System PLL0, System/USB0 PLL Control Register 1 (HW_CLKCTRLPLL0CTRL1)..........................858
System PLL1, USB1 PLL Control Register 0 (HW_CLKCTRLPLL1CTRL0).......................................859
System PLL1, USB1 PLL Control Register 1 (HW_CLKCTRLPLL1CTRL1).......................................861
System PLL2, Ethernet PLL Control Register 0 (HW_CLKCTRLPLL2CTRL0)...................................862
CPU Clock Control Register (HW_CLKCTRLCPU)...............................................................................863
AHB, APBH Bus Clock Control Register (HW_CLKCTRLHBUS)........................................................865
APBX Clock Control Register (HW_CLKCTRLXBUS).........................................................................867
XTAL Clock Control Register (HW_CLKCTRLXTAL)..........................................................................868
Synchronous Serial Port0 Clock Control Register (HW_CLKCTRLSSP0).............................................869
Synchronous Serial Port1 Clock Control Register (HW_CLKCTRLSSP1).............................................870
Synchronous Serial Port2 Clock Control Register (HW_CLKCTRLSSP2).............................................871
10.2.3.1
10.2.3.2
10.2.3.3
10.3.2.1
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
10.3.2.1.1
CLK_P, CLK_H......................................................................................................................848
CLK_EMI...............................................................................................................................849
System Clocks.........................................................................................................................849
Fractional Clock Divide Example, Divide by 3.5...................................................................851
Fractional ClockDivide Example, Divide by 3/8..................................................851
Title
Page
23