MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1097

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

The address and command signals including all DRAM interface signals except the DQ
and DQS: clock-enable (CKE), chip-select, bank-address, row/cloumn_address, CASn,
RASn, WEn, and so on.
Freescale Semiconductor, Inc.
• The Address and command signals are latched out by the falling-edge of emi_clk; In
• The fly-time is the signal's propagation time start from the DDR_PHY logic, go across
• The DRAM device captures the Address and Command signals with the rising edge of
another words, the rise-edge of emi_clk is center-aligned with the output Address and
Command signals.
the output I/O (PAD) of i.MX28, go through the signal trace on the board, then arrive
the PIN of the DRAM device.
emi_clk_o.
DRAM device capture ADDR by the rise-edge of emi_clk_o
emi_clk
io_addr_out
emi_addr_o
emi_clk_o
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 14-8. I/O Address Timing
addr
addr
fly time = PAD _Delay + Board_Delay
At the DRAM device Pins
At the port of DDR_PHY
Chapter 14 External Memory Interface (EMI)
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