MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 345

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

6.2 APBH DMA
The DMA supports sixteen channels of DMA services, as shown in the following table.
The shared DMA resource allows each independent channel to follow a simple chained
command list. Command chains are built up using the general structure, as shown in
6-2.
A single command structure or channel command word specifies a number of operations
to be performed by the DMA in support of a given device. Thus, the CPU can set up large
units of work, chaining together many DMA channel command words, pass them off to the
DMA, and have no further concern for the device until the DMA completion interrupt
occurs. The goal is to have enough intelligence in the DMA and the devices to keep the
interrupt frequency from any device below 1 KHz (arrival intervals longer than 1 ms).
Freescale Semiconductor, Inc.
APBH DMA CHANNEL #
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 6-1. APBH DMA Channel Assignments
Chapter 6 AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA)
HSADC
EMPTY
EMPTY
USAGE
GPMI0
GPMI1
GPMI2
GPMI3
GPMI4
GPMI5
GPMI6
GPMI7
LCDIF
SSP0
SSP1
SSP2
SSP3
Figure
345