MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 957

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

The following bits are used to store super root key hash value, which will be used by the
ROM HAB (high assurance boot) library to check the boot image has the correct super root
key. The SRK hash value will be read by the ARM CPU, so those registers are shadowed
and can also be locked. If HAB is not used, these fuses can be used for other purposes.
12.3.2 Persistent Bits
Persistent bits are used to control certain features in ROM, as shown in
more information on persistent bits, see
Freescale Semiconductor, Inc.
HW_OCOTP_SRK0: 0x8002C220:31:0
HW_OCOTP_SRK1: 0x8002C230:31:0
HW_OCOTP_SRK2: 0x8002C240:31:0
HW_OCOTP_SRK3: 0x8002C250:31:0
HW_OCOTP_SRK4: 0x8002C260:31:0
HW_OCOTP_SRK5: 0x8002C270:31:0
HW_OCOTP_SRK6: 0x8002C280:31:0
HW_OCOTP_SRK7: 0x8002C290:31:0
HW_RTC_PERSISTENT1:0x8005C070:3
HW_RTC_PERSISTENT1:0x8005C070:2
HW_RTC_PERSISTENT1:0x8005C070:1
HW_RTC_PERSISTENT1:0x8005C070:0
eFuse
Bank:Add:Bit
Persistent Bit
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 12-9. Super Root Key Hash Bits
Table 12-10. Persistent Bits
Super Root Key hash value bits 255-254
Super Root Key hash value bits 223-192
Super Root Key hash value bits 191-160
Super Root Key hash value bits 159-128
Super Root Key hash value bits 127-96
Super Root Key hash value bits 95-64
Super Root Key hash value bits 63-32
Super Root Key hash value bits 31-0
SD_SPEED_ENABLE—If this bit is set, ROM puts the SD/MMC card in
high-speed mode.
NAND_SDK_BLOCK_REWRITE—The NAND driver sets this bit to indicate
to the SDK that the boot image has ECC errors that reached the warning
threshold. The SDK regenerates the firmware by copying it from the backup
image. The SDK clears this bit.
ROM_SECONDARY_BOOT—When this bit is set, ROM attempts to boot
from the secondary image if the boot driver supports it. This bit is set by the
ROM boot driver and cleared by the SDK after repair.
FORCE_RECOVERY—When this bit is set, the ROM code forces the system
to boot in recovery mode, regardless of the selected mode. The ROM clears
the bit.
eFuse Function
Function
RTC
Overview.
Table
Chapter 12 Boot Modes
12-10. For
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