MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1187

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
Re-
14.8.93 DRAM Control Register 98 (HW_DRAM_CTL98)
This is a DRAM configuration register.
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
DLL_OBS_REG_
Bit
DLL_OBS_REG_
W
W
R
R
31
31
0
0
31 0
31 0
Field
Field
0_2
0_3
30
30
0
0
29
29
0
0
HW_DRAM_CTL97
HW_DRAM_CTL98
28
28
0
0
Reports the lock status and the encoder value for data slice 2. READ-ONLY
There is a separate dll_obs_reg_0_X parameter for each of the slices of data sent on the DFI data bus.
Bits [31:1] = Reports the DLL encoder value from the master DLL to the slave DLL's. The slaves use this
value to set up their delays for the clk_wr and read DQS signals.
Bit [0] = DLL Lock Indicator.
'b0 = DLL has not locked.
'b1 = DLL is locked.
Reports the lock status and the encoder value for data slice 3. READ-ONLY
There is a separate dll_obs_reg_0_X parameter for each of the slices of data sent on the DFI data bus.
Bits [31:1] = Reports the DLL encoder value from the master DLL to the slave DLL's. The slaves use this
value to set up their delays for the clk_wr and read DQS signals.
Bit [0] = DLL Lock Indicator.
'b0 = DLL has not locked.
'b1 = DLL is locked.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
HW_DRAM_CTL97 field descriptions
HW_DRAM_CTL98 field descriptions
800E_0000h base + 184h offset = 800E_0184h
800E_0000h base + 188h offset = 800E_0188h
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
DLL_OBS_REG_0_2
DLL_OBS_REG_0_3
18
18
0
0
17
17
0
0
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
Chapter 14 External Memory Interface (EMI)
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1187
0
0
0
0