MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 42

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
42
17.1
17.2
17.3
17.4
17.5
17.6
17.7
17.8
Overview.....................................................................................................................................................................1311
External Pins...............................................................................................................................................................1313
Bit Rate Generation....................................................................................................................................................1313
Frame Format for SPI and SSI....................................................................................................................................1314
Motorola SPI Mode....................................................................................................................................................1314
Winbond SPI Mode.....................................................................................................................................................1320
Texas Instruments Synchronous Serial Interface (SSI) Mode....................................................................................1320
SD/SDIO/MMC Mode................................................................................................................................................1321
16.6.18
16.6.19
16.6.20
16.6.21
16.6.22
17.5.1
17.5.2
17.5.3
17.5.4
17.5.5
17.5.6
17.8.1
17.8.2
17.8.3
Chien Search Debug Read Register (HW_BCHDBGCSFEREAD).......................................................1308
Syndrome Generator Debug Read Register (HW_BCHDBGSYNDGENREAD)..................................1308
Bus Master and ECC Controller Debug Read Register (HW_BCHDBGAHBMREAD).......................1309
Block Name Register (HW_BCHBLOCKNAME).................................................................................1309
BCH Version Register (HW_BCHVERSION)........................................................................................1310
SPI DMA Mode.......................................................................................................................................1315
Motorola SPI Frame Format....................................................................................................................1315
Motorola SPI Format with Polarity=0, Phase=0.....................................................................................1315
Motorola SPI Format with Polarity=0, Phase=1.....................................................................................1317
Motorola SPI Format with Polarity=1, Phase=0.....................................................................................1318
Motorola SPI Format with Polarity=1, Phase=1.....................................................................................1319
SD/MMC Command/Response Transfer.................................................................................................1322
SD/MMC Data Block Transfer................................................................................................................1323
eMMC Boot Operation............................................................................................................................1326
17.5.2.1
17.5.2.2
17.8.2.1
17.8.2.2
17.8.2.3
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Clock Polarity.......................................................................................................................1315
Clock Phase...........................................................................................................................1315
SD/MMC Multiple Block Transfers.....................................................................................1325
eMMC DDR operation..........................................................................................................1325
SD/MMC Block Transfer CRC Protection...........................................................................1326
Synchronous Serial Ports (SSP)
Chapter 17
Title
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