MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1645

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

The timer and all timestamp related information should be configured to show the true
nanoseconds value of a second (that is, the timer is configured to have a period of 1 second).
Hence, the values range from 0 to (1*10
implemented in software using an interrupt function that is executed whenever the
nanoseconds counter wraps at 1*10
26.3.13.7 Capture/Compare Block
The Capture / Compare block can provide precise hardware timing for four input events
and four output events.
The capture registers (CAPT_REG..) latch the time value when the corresponding external
event occurs (evt_in()). If the corresponding interrupt bit is enabled in the CCB_INT register,
an interrupt can be generated.
The compare registers (COMP_REG_..) are loaded with the time at which the corresponding
event should occur. The timer reached the value, the corresponding output pin (evt_out())
is asserted. If the corresponding interrupt bit is enabled in the EIMR register, an interrupt
can be generated.
26.3.14 FIFO Thresholds
26.3.14.1 Overview
The Core FIFO thresholds are all fully programmable to provide the possibility to
dynamically change the FIFO operation. For example, store and forward transfer can be
enabled by a simple change in the FIFO threshold registers. The thresholds are defined in
64-bit words.
26.3.14.2 Receive FIFO
Four programmable thresholds are available which are programmed with the registers
RX_ALMOST_EMPTY, RX_ALMOST_FULL, RX_SECTION_EMPTY and
RX_SECTION_FULL which can be set to any value to control operation as follows table.
Freescale Semiconductor, Inc.
Implementing the seconds counter in software is not a strict
requirement.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
9
.
9
)-1. In this application, the seconds counter is
Note
Chapter 26 Ethernet Controller (ENET)
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