MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1850

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
Address:
29.9.7 ENET SWI Define port in blocking state and enable or disable
When blocking is enabled for a port (Bit=1) only Bridge Protocol data units are accepted
on that input, all other frames are discarded. When learning is disabled for a port (Bit=1),
only Bridge Protocol Data Unit frames will be learned. Other frames will be ignored for
learning. Both functions operate independently from each other.
1850
Reset
Reset
DEFAULT_
DEFAULT_
DEFAULT_
Bit
Bit
W
W
RSRVD0
MCAST_
MCAST_
MCAST_
MASK_2
MASK_1
MASK_0
R
R
Field
31 3
2
1
0
31
15
0
0
learning. (HW_ENET_SWI_INPUT_LEARN_BLOCK)
HW_ENET_SWI_MCAST_DEFAULT_MASK
offset = 800F_8018h
30
14
0
0
Reserved bits. Write as 0.
port 2
port 1
port 0
HW_ENET_SWI_MCAST_DEFAULT_MASK field descriptions
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
26
10
0
0
RSRVD0[15:3]
25
0
0
9
RSRVD0[31:16]
800F_8000h base + 18h
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0