MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 807
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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HW_PINCTRL_DIN3_TOG: 0x93C
This register reflects the current values of all the bank 3 pins. The register accurately reflects
the state of the pin regardless of the setting of the HW_PINCTRL_MUXSELx or
HW_PINCTRL_DOEx registers, but generally, if it is desired to use a pin as a general
purpose input, the pin's two bits in the HW_PINCTRL_MUXSELx register should be set
to 3 (GPIO mode) and the pin's bit in the HW_PINCTRL_DOEx register should be set to
0 (disabled) to insure that the chip is not driving the pin.
Address:
9.4.52 PINCTRL Bank 4 Data Input Register (HW_PINCTRL_DIN4)
The current value of all bank 4 pins may be read from the PINCTRL Bank 4 Data Input
Register.
HW_PINCTRL_DIN4: 0x940
HW_PINCTRL_DIN4_SET: 0x944
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
W
W
RSRVD1
R
R
Field
30 0
DIN
31
31
15
0
0
HW_PINCTRL_DIN3
30
14
0
0
Empty Description.
Each bit in this read-only register corresponds to one of the 31 pins in bank 3. The current state of each pin
in bank 3, synchronized to HCLK, may be read here.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_PINCTRL_DIN3 field descriptions
8001_8000h base + 930h offset = 8001_8930h
27
11
0
0
26
10
0
0
25
0
0
9
24
DIN[15:0]
0
0
8
DIN[30:16]
Description
23
0
0
7
22
0
0
6
Chapter 9 Pin Control and GPIO (PinCtrl)
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0
807
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