MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1623

no-image

MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
In the MAC is programmed to operate in half duplex mode, the MAC performed the
following additional action:
26.3.7.2 Collision Detection in Half Duplex Mode
If the packet is received with a collision detected during the reception of the first 64 bytes,
the packet is discarded (if frame size was less than ~14 octets) or transmitted to the user
application with an error and status bit ff_rx_err_stat(24) set to '1'.
Freescale Semiconductor, Inc.
• Terminate Pause Frames
• Check Frame Length
• Remove payload padding if it exists
• Calculate and verify CRC-32
• Write received Frames in the Core receive FIFO
• Check if the frame is received with a collision
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 26-12. MAC Receive Flow
discard
discard
discard
discard
Compare Destination Address
with locol/multicast/broadcast
discriminate length/type
verify frame length
and frame status
Detect Preamble
remove padding
receive payload
write data FIFO
information
verify CRC
Collision
Half Duplex only
Chapter 26 Ethernet Controller (ENET)
1623

Related parts for MCIMX286CVM4B