MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 32

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Section Number
32
14.5
14.6
EMI Multi-Port Arbiter...............................................................................................................................................1080
Core Command Queue with Placement Logic...........................................................................................................1090
14.4.9
14.4.10
14.4.11
14.4.12
14.4.13
14.5.1
14.5.2
14.5.3
14.5.4
14.5.5
14.5.6
14.5.7
14.5.8
14.5.9
14.6.1
Error Responses.......................................................................................................................................1076
Arbiter......................................................................................................................................................1077
Write Data Queue....................................................................................................................................1077
DRAM Command Processing.................................................................................................................1077
Latency....................................................................................................................................................1078
Arbitration Overview...............................................................................................................................1081
Understanding Round-Robin Arbitration................................................................................................1081
Understanding Port Priority.....................................................................................................................1082
Understanding Port Bandwidth...............................................................................................................1083
Understanding Port Bandwidth Hold-Off................................................................................................1085
Priority Round-Robin Arbitration Summary...........................................................................................1086
Arbitration Examples...............................................................................................................................1087
Configuring and Programming for Priority Round-Robin Arbitration....................................................1089
Command Queue with Placement Logic.................................................................................................1090
Rules of the Placement Algorithm...........................................................................................................1090
14.4.8.7
14.4.8.8
14.4.9.1
14.4.9.2
14.5.8.1
14.5.8.2
14.6.1.1
14.6.1.2
14.6.1.3
14.6.1.4
14.6.1.5
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Passing Exclusive Access Check...........................................................................................1076
Failing Exclusive Access Check...........................................................................................1076
AXI Error Response..............................................................................................................1076
AXI Error Reporting.............................................................................................................1077
Definition of the Statistics Window and the Number of Counters........................................1089
Command Priority, Port Bandwidth, and Bandwidth Overflow...........................................1089
Address Collision/Data Coherency Violation.......................................................................1091
Source ID Collision...............................................................................................................1091
Write Buffer Collision...........................................................................................................1092
Priority..................................................................................................................................1092
Bank Splitting.......................................................................................................................1092
Title
Freescale Semiconductor, Inc.
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