MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1298

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
16.6.10 Hardware BCH ECC Flash 1 Layout 0 Register
The flash format register contains a description of the logical layout of data on the flash
device. This register is used in conjuction with the FLASH1LAYOUT1 register to control
the format for the devices selecting layout 1 in the LAYOUTSELECT register.
Each pair of layout registers describes one of four supported flash configurations. Software
should program the LAYOUTSELECT register for each supported GPMI chip select to
select from one of the fourlayout values. Each pair of registers contains settings that are
used by the BCH block while reading/writing the flash page to control data, metadata, and
flash page sizes as well as the ECC correction level. The first block written to flash can be
programmed to have different ECC, metadata, and data sizes from subsequent data blocks
on the device. In addition, the number of blocks stored on a page of flash is not fixed, but
instead is determined by the number of bytes consumed by the initial (block 0) and
subsequent data blocks. See the BCH programming reference manual for more information
on setting up the flash layout registers.
EXAMPLE
HW_BCH_FLASH1LAYOUT0_WR(0x020C8000);
HW_BCH_FLASH1LAYOUT1_WR(0x04408200);
1298
DATAN_SIZE
Field
11 0
(HW_BCH_FLASH1LAYOUT0)
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
Indicates the size of the subsequent data blocks (in bytes) to be stored on the flash page. The data size
MUST be a multiple of four bytes. The size of subsequent data blocks does not have to match the data size
for block 0, which is important when metadata is stored separately or for balancing the amount of data stored
in each block.
HW_BCH_FLASH0LAYOUT1 field descriptions (continued)
ECC2 — ECC 2 to be performed
ECC4 — ECC 4 to be performed
ECC6 — ECC 6 to be performed
ECC8 — ECC 8 to be performed
ECC10 — ECC 10 to be performed
ECC12 — ECC 12 to be performed
ECC14 — ECC 14 to be performed
ECC16 — ECC 16 to be performed
ECC18 — ECC 18 to be performed
ECC20 — ECC 20 to be performed
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Description
Freescale Semiconductor, Inc.