MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 96

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

i.MX28 Product Features
i.MX28 also contains one bus performance monitor modules (PERFMON). There is one
PERFMON per AXI segment. The key features of the PERFMON are as follows:
1.3.2.2 AHB Buses
The AHB is the main high-performance system bus and is implemented in three layers, as
follows:
The ARM926 instruction bus (AHB1) is a single-master layer as the ARM926 data bus
(AHB2). The AHB3 has multiple masters, as shown in
The ARM926 data bus connects to all the slaves in the system, including RAMs, ROMs,
bridge slaves, Ethernet and USB slaves. The APB peripherals can act as AHB slaves through
the AHB-APB bridge. The AHB has nine slaves:
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• Pixel Processing Pipeline (PXP)
• Display Controller (LCDIF)
• BCH-ECC Engine
• Real-time performance statistics collection on three AXI buses
• Single or multiple master transactions monitoring
• Various interrupts support: address trap, latency threshold and so on
• AXI protocol and out-of-order sequence support
• Parameterized performance monitor for scalability
• Layer 1 (AHB1) CPU instruction access to OCRAM, OCROM
• Layer 2 (AHB2) CPU data access to OCRAM, OCROM, all bridges, Ethernet, USB
• Layer 3 (AHB3) APBH DMA, APBX DMA, Ethernet and USB masters
• USB slave
• Ethernet slave
• On-chip RAM
• On-chip ROM
and DFLPT slaves
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure
1-2.
Freescale Semiconductor, Inc.