MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2033

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

deserializer and holding register. The receive state machine handles the rx_valid, rx_validh,
and handshake with the USB controller. The handshake is not interlocked, in that there is
no rx_ready signal coming from the controller. The controller must take each 16-bit value
as presented by the PHY. The receive state machine provides an rx_active signal to the
controller that indicates when it is inside a valid packet (SYNC detected, and so on).
32.2.4 Analog Receiver
The analog receiver comprises five differential receivers, two single-ended receivers, and
a 9X, 480 MHz HS data sampling module, as shown in the figure below and described
further in this section.
32.2.4.1 HS Differential Receiver
The high-speed differential receiver is both a differential analog receiver and threshold
comparator. Its output is a one if the differential signal is greater than a 0-V threshold.
Otherwise, its output is 0. Its purpose is to discriminate the ± 400-mV differential voltage
resulting from the high-speed drivers current flow into the dual 45 terminations found on
Freescale Semiconductor, Inc.
Figure 32-2. USB 2.0 PHY Analog Transceiver Block Diagram
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
LS/FS Differential RCVR
HS Differential RCVR
Squelch
USB_Plugged_In_Detect
HS_Disconnect_Detect
Single-Ended Detector SE_DP
Single-Ended Detector SE_DM
LS/FS DataDrive
LS/FS Driver Output Enable
FS Edge Mode Select
RPU Enable
HS Drive Enable
HS Data Drive
Assert SE0
HS Current Source Enable
power-down controls
Test and discrete
Receiver
Transmitter
VDDIO
(3.3V)
USB_DN
USB_DP
1500
15000
15000
Chapter 32 Integrated USB 2.0 PHY
Cable
USB
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