MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1679

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

26.4.22 ENET MAC Pointer to Transmit Descriptor Ring Register
The user writes the ETDSR. It provides a pointer to the start of the circular transmit buffer
descriptor queue in external memory. This pointer must be 32-bit aligned; however, it is
recommended it be made 128-bit aligned (evenly divisible by 16). The user should write
bits 1 and 0 to 0. Hardware ignores non-zero values in these two bit positions.
Address:
Freescale Semiconductor, Inc.
Reset
Reset
R_DES_START
X_DES_START
Bit
Bit
W
W
RSRVD0
RSRVD0
R
R
Field
31 2
Field
31 2
1 0
1 0
31
15
0
0
HW_ENET_MAC_ETDSR 800F_0000h base + 184h offset = 800F_0184h
(HW_ENET_MAC_ETDSR)
30
14
0
0
Pointer to start of receive buffer descriptor queue.
Reserved bits. Write as 0.
Pointer to start of transmit buffer descriptor queue.
Reserved bits. Write as 0.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
HW_ENET_MAC_ERDSR field descriptions
0
0
HW_ENET_MAC_ETDSR field descriptions
27
11
0
0
26
10
0
0
X_DES_START[15:2]
25
0
0
9
X_DES_START[31:16]
24
0
0
8
Description
Description
23
0
0
7
22
0
0
6
21
0
5
0
Chapter 26 Ethernet Controller (ENET)
20
0
4
0
19
0
0
3
18
0
0
2
17
RSRVD0
0
0
1
1679
16
0
0
0