MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2117

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 34
Pixel Pipeline (PXP)
34.1 Pixel Pipeling (PXP) Overview
The pixel pipeline is used to perform alpha blending of graphic or video buffers with graphics
data before sending to an LCD display or TV encoder. The PXP also supports image rotation
for hand-held devices that require both portrait and landscape image support.
The PXP is organized as having a background image (S0) and one or more overlay images
that can be blended with the background. Each overlay image must be a multiple of the
block size in pixels in both height and width and the offset of the overlay into the background
image must also be a multiple of the block size in pixels. As the PXP processes data, it reads
each NxN block from the background image and finds the highest priority (lowest numbered)
overlay that is co-located at that block coordinate. The PXP then fetches the overlay and
performs the alpha blending and color key operations on the two blocks. The resulting pixel
block is then written to the corresponding block in the output buffer.
Freescale Semiconductor, Inc.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 34-1. Pixel Pipeline (PXP) Block Diagram
Control
Logic
APBH
Programmable Registers
PXP
Colorspace
/Scaling
Colorkey/ Alpha Blend
Rotation
Buffers
S0/
RGB
RGB
APBH Bridge/DMA
AXI
S1/Overlay
RGB
RGB Write Data
S0 Data
PXP
S1 RGB
Data
Interface
AXI
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