MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1085

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

14.5.5 Understanding Port Bandwidth Hold-Off
When the bandwidth used by a port exceeds its specified limit, that port is held off from
subsequent arbitration decisions for a period of time known as the statistics reporting time.
This causes a period of inactivity from that port, allowing the actual bandwidth used for
that port to fall below the threshold. Since the bandwidth used is updated every ten cycles,
the minimum hold off period for this system is ten cycles.
This scheme is designed to constrain individual ports (especially ports programmed at higher
priority) from overtaking all available bandwidth and locking out other ports. However,
this can have its drawbacks.
Consider a situation where only one port has been actively requesting and has therefore
used all of its available bandwidth. The bandwidth hold-off will prevent additional requests
from being accepted, even though no other ports are requesting. The core logic command
queue will sit empty for several cycles while the hold-off is cleared. This is obviously wasted
bandwidth and is detrimental to overall system performance. EMI has incorporated a
bandwidth hold-off override function for such a situation in the axiY_bdw_ovflow
parameters.
A port will be allowed to exceed its allocated bandwidth when all of these conditions are
true:
This last condition is a preventative measure to maintain latency requirements for ports
programmed at higher priority. When a port is allowed to exceed bandwidth, it may fill the
command queue with transactions. If this occurs, and a higher priority port starts requesting,
then there will be no room in the command queue for the new requests. This means that the
Freescale Semiconductor, Inc.
7
8
9
0
COUNTER
NUMBER
• The bandwidth overflow parameter (axiY_bdw_ovflow) is set to ‘b1 for port Y.
• No other port, whose bandwidth has not been exceeded, is requesting at the same priority
• The command queue has less than the number of entries specified in the
level.
arb_cmd_q_threshold parameter.
70 - 169
80 - 179
90 - 189
100 - 199
CYCLES COUNTING
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
43 / 100 = 43%
35 / 100 = 35%
29 / 100 = 29%
30 / 100 = 30%
PORT 0
23 / 100 = 23%
18 / 100 = 18%
17 / 100 = 17%
17 / 100 = 17%
PORT 1
CALCULATED USAGE
54 / 100 = 54%
52 / 100 = 52%
49 / 100 = 49%
47 / 100 = 47%
PORT 2
Chapter 14 External Memory Interface (EMI)
40 / 100 = 40%
42 / 100 = 42%
43 / 100 = 43%
34 / 100 = 34%
PORT 3
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