MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 513

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor, Inc.
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
CMDCMPLT_
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
IRQ_EN
CH12_
CH11_
CH10_
CH9_
CH8_
CH7_
CH6_
CH5_
CH4_
CH3_
CH2_
CH1_
Field
28
27
26
25
24
23
22
21
20
19
18
17
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 12.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 11.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 10.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 9.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 8.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 7.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 6.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 5.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 4.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 3.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 2.
Setting this bit enables the generation of an interrupt request for APBX DMA Channel 1.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_APBX_CTRL1 field descriptions (continued)
Chapter 7 AHB-to-APBX Bridge with DMA (APBX-Bridge-DMA)
Description
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