MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1531

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
24.2.1 Fractional Baud Rate Divider
The baud rate divisor is calculated from the frequency of UARTCLK and the desired baud
rate by using the following formula:
The divisor must be between 0x00000040 and 0x003FFFC0, inclusive. Program the lowest
6 bits of the divisor into BAUD_DIVFRAC, and the next 16 bits of the divisor into
BAUD_DIVINT.
In the debug UART, HW_UARTDBGLCR_H, HW_UARTDBGIBRD, and
HW_UARTDBGFBRD form a single 30-bit wide register (UARTLCR) that is updated on
a single write strobe generated by an HW_UARTDBGLCR_H write. So, in order to internally
update the contents of HW_UARTDBGIBRD or HW_UARTDBGFBRD, a write to
HW_UARTDBGLCR_H must always be performed at the end.
24.2.2 UART Character Frame
Figure 24-2
24.2.3 Data Transmission or Reception
Data received or transmitted is stored in two 32-byte FIFOs, though the receive FIFO has
an extra four bits per character for status information.
For transmission, data is written into the transmit FIFO. If the Debug UART is enabled, it
causes a data frame to start transmitting with the parameters indicated in UARTLCR_H.
Data continues to be transmitted until there is no data left in the transmit FIFO.
Freescale Semiconductor, Inc.
• Break generation
• Baud rate divisor
divisor = (UARTCLK * 4) / baud rate, rounded to the nearest integer
illustrates the UART character frame.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 24-2. Debug UART Character Frame
1
0
UARTTXD
Start
n
lsb
5 8 data bits
msb
if enabled
Parity bit
stop bits
1 2
Chapter 24 Debug UART (DUART)
1531

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