MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1081

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 14 External Memory Interface (EMI)
The Arbiter logic routes read data from the core logic to the appropriate port. The requesting
port is assumed able to receive the data. Write data from each port is connected directly to
its own write data interface in the core logic, allowing the ports to independently pass write
data to the core buffers.
14.5.1 Arbitration Overview
The bandwidth allocation scheme is an extension of simple round-robin arbitration. It is
based on the priority of the requests and is influenced by the actual bandwidth consumed
by the port inside the core logic.
Priority round-robin arbitration is a complex arbitration scheme. In order to understand its
operation, each concept must be first understood individually. Section
Understanding
Round-Robin Arbitration
through section
Understanding Port Bandwidth Hold-Off
describe
the various components of priority round-robin arbitration.
14.5.2 Understanding Round-Robin Arbitration
Round-robin operation is a simple form of arbitration which offers each port an opportunity
to issue a command. This scheme uses a counter that rotates through the port numbers,
incrementing every time a port request is granted.
If the port that the counter is referencing has an active request, and the core command queue
is not full, then this request will be sent to the core. If there is not an active request for that
port, then the port will be skipped and the next port will be checked. The counter will
increment by one whenever any request has been processed, regardless of which port’s
request was arbitrated.
Round-robin operation ensures that each port’s requests can be successfully arbitrated into
the core logic every N cycles, where N is the number of ports in the EMI. No port will ever
be locked out, and any port can have its requests serviced on every cycle as long as all other
ports are quiet and the command queue is not full.
An example of the round-robin scheme is shown in Table “Round-Robin Operation
Example”.
Cycles 0, 2 and 6 show the system behavior when the command queue is full. Cycle 8 shows
the system behavior when the port addressed by the arbitration counter does not have an
active request. All other cycles show normal behavior.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.
1081