MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 916

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
916
PWD_CHARGE_
CHARGE_4P2_
VBUSDROOP_
HEADROOM_
VBUSVALID_
5VBRNOUT
RSRVD6
RSRVD5
RSRVD4
RSRVD3
RSRVD2
PWDN_
31 30
29 28
26 24
23 22
21 20
19 18
17 12
ILIMIT
TRSH
TRSH
10 8
Field
ADJ
4P2
27
11
7
Reserved.
Set the threshold for the VBUSDROOP comparator. This comparator should typically be programmed at
least 200mV above VBUSVALID, and can be used to terminate battery charge when the voltage on VDD5V
falls below the programmed threshold. This comparator has ~50mV of hystersis to prevent chattering at the
comparator trip point.
0b00: 4.3V
0b01: 4.4V
0b10: 4.5V(default)
0b11: 4.7V
Reserved.
Adjustment to optimize the performance of the battery charge and 4.2V regulation circuit at low 5v voltages.
Reserved.
Controls the power down of both the battery charger and 4.2V regulation circuit. Default is powered down.
Reserved.
Limits the combined current from 5V that the battery charger and DCDC_4P2 circuit consume. Current
represented by each bits is as follows: (400 mA, 200 mA, 100 mA, 50 mA, 20 mA, 10 mA) = (bit 5,bit 4, bit
3, bit 2, bit 1, bit 0). The DCDC_4P2 circuit is given priority as the sum of the currents exceeds the limit.
Reserved.
Set the threshold for the VBUSVALID comparator.This comparator is the most accurate method to determine
the presence of 5v, and includes hystersis to minimize the need for software debounce of the detection.
This comparator has ~50mV of hystersis to prevent chattering at the comparator trip point.
0b000: 2.9V
0b001: 4.0V
0b010: 4.1V
0b011: 4.2V
0b100: 4.3V(default)
0b101: 4.4V
0b110: 4.5V
0b111: 4.6V
The purpose of this bit is to power down the device if 5V is removed before the system is completely initialized.
Clear this bit to disable automatic hardware powerdown AFTER the system is configured for 5v removal.
This bit should not be set if DCDC_XFER is set.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_POWER_5VCTRL field descriptions
Description
Freescale Semiconductor, Inc.

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