MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1561

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Once the MB is activated in the third step, it will be able to receive frames that match the
programmed ID. At the end of a successful reception, the MB is updated by the MBM as
follows:
Upon receiving the MB interrupt, the ARM should service the received frame using the
following procedure:
Upon reading the Control and Status word, if the BUSY bit is set in the Code field, then
the ARM should defer the access to the MB until this bit is negated. Reading the Free
Running Timer is not mandatory. If not executed the MB remains locked, unless the ARM
reads the C/S word of another MB. Note that only a single MB is locked at a time. The only
mandatory ARM read operation is the one on the Control and Status word to assure data
coherency (see
The ARM should synchronize to frame reception by the status flag bit for the specific MB
in one of the IFLAG Registers and not by the Code field of that MB. Polling the Code field
does not work because once a frame was received and the ARM services the MB (by reading
the C/S word followed by unlocking the MB), the Code field will not return to EMPTY. It
Freescale Semiconductor, Inc.
• Write the ID word
• Write '0100' to the Code field of the Control and Status word to activate the MB
• The value of the Free Running Timer is written into the Time Stamp field
• The received ID, Data (8 bytes at most) and Length fields are stored
• The Code field in the Control and Status word is updated (see
• A status flag is set in the Interrupt Flag Register and an interrupt is generated if allowed
• Read the Control and Status word (mandatory – activates an internal lock for this buffer)
• Read the ID field (optional – needed only if a mask was used)
• Read the Data field
• Read the Free Running Timer (optional – releases the internal lock)
MCR negated), just write '1000' to the Code field to inactivate the MB, but then the
pending frame may be transmitted without notification (see
Deactivation). If the MB already programmed as a receiver, just write '0000' to the
Code field of the Control and Status word to keep the MB inactive.
25-3
by the corresponding Interrupt Mask Register bit
in Section
Data
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Message Buffer
Coherence).
Structure)
Chapter 25 Controller Area Network (FlexCAN)
Message Buffer
Table 25-2
and
Table
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