MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1625

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

generate a number between 0 and 63. The msb of the CRC result selects GAUR (msb equals
1) or GALR (msb equals 0). The least significant five bits of the hash result select the bit
within the selected register. If the CRC generator selects a bit set in the hash table, the frame
is accepted; otherwise, it is rejected.
For example, if eight group addresses are stored in the hash table and random group addresses
are received, the hash table prevents roughly 56/64 (or 87.5%) of the group address frames
from reaching memory. Those that do reach memory must be further filtered by the processor
to determine if they truly contain one of the eight desired addresses.
The effectiveness of the hash table declines as the number of addresses increases.
The user must initialize the hash table registers. Use this CRC32 polynomial to compute
the hash:
If promiscuous mode is enabled (Configuration register bit PROM set to '1'), all Unicast
and all Multicast frames are accepted regardless of GAUR / GALR and IAUR / IALR
settings.
26.3.7.4.4 Broadcast Address Reject
All Broadcast Frames are accepted if the register bit BC_REJ is set to '0' or if the register
bit PROM is set to '1'. If PROM is set to '0' when BC_REJ set to '1', all Broadcast Frames
are rejected.
26.3.7.4.5 Miss-Bit Implementation
For higher layer filtering purposes, the receive FIFO interface provides a status bit
(ff_rx_err_stat[26]) indicating an address miss when the MAC operates in promiscuous
mode and accepted a frame that would otherwise be rejected.
Freescale Semiconductor, Inc.
• FCS(X) = X 32 +X 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 +X 8 +X 7 +X 5 +X
4 +X 2 +X 1 +1
PROM
0
0
1
1
Table 26-21. Broadcast Address Reject Programming
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
BC_REJ
0
1
0
1
Broadcast Frames
Chapter 26 Ethernet Controller (ENET)
Accepted
Accepted
Accepted
Rejected
1625