MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 104

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

i.MX28 Product Features
Each USB is a dynamically configured port that can support up to seven RX and seven TX
endpoints besides EP0, each of which may be configured for bulk, interrupt, or isochronous
transfers. The USB configuration information is read from on-chip memory through the
USB controller's DMA.
See
for more information.
1.3.14 General-Purpose Media Interface (GPMI)
The chip includes a general-purpose media interface (GPMI) controller that supports NAND
devices (all packages).
The NAND Flash interface provides a state machine that provides all the logic necessary
to perform DMA functions between on-chip or off-chip RAM and up to eight NAND Flash
devices. The controller and DMA are sophisticated enough to manage the sharing of a single
8-bit wide data bus among eight NAND devices, without detailed CPU intervention. This
allows the i.MX28 to provide unprecedented levels of NAND performance.
The general-purpose media interface can be described as two fairly independent devices in
one. The three operating modes are integrated into one overall state machine that can freely
intermix cycles to different device types on the media interface. There are eight chip selects
on the media interface. Each chip select can be programmed to have a different type device
installed.
The GPMI pin timings are based on a dedicated clock divider from PLL0, allowing the
CPU clock divider to change without affecting the GPMI.
See
1.3.15 Hardware Acceleration for ECC for Robust External Storage
The hardware ECC accelerator provides a forward error-correction function for improving
the reliability of various storage media that may be attached to the i.MX28. Modern
high-density NAND Flash devices presume the existence of forward error-correction
algorithms to correct some soft and/or hard bit errors within the device, allowing higher
device yields and, therefore, lower NAND device costs.
The i.MX28 contains an Error Correction Code (ECC) hardware engine implementing the
Bose Ray-Choudhury Hocquenghem algorithm for up to 20 bits of correction. The ECC
engine is tightly coupled to the GPMI and has a dedicated programming model and a DMA
structure.
104
USB High-Speed OTG-capable USB Controller Overview
General-Purpose Media Interface Overview
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
for more information.
and
USB PHY Overview
Freescale Semiconductor, Inc.