MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1480

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programming and Enabling the RTC Clock
22.2 Programming and Enabling the RTC Clock
The RTC functions implemented in the crystal power domain are referred to as RTC analog
functions. The clock frequency and clock source for the RTC analog functions are
programmable. There are three possible clock options.
Thus, the HW_RTC_PERSISTENT0_XTAL32_FREQ bit gives the systems designer some
flexibility as to which external crystal to use on the board.
Switching between these two clock domains is handled by a glitch-free clock mux and can
be done on the fly. The 1-Hz time base is derived by dividing either 32.768 KHz by 32768
or by dividing 31.250 KHz by 31,250, or by dividing 32.000 KHz by 32000.
By reading and examining the HW_RTC_STAT_XTAL32000_PRESENT and
HW_RTC_STAT_XTAL32768_PRESENT bits, software can discover if there is an optional
crystal clock present and the frequency at which it runs (32.768 KHz or 32.000 KHz). Only
one of these fuse bits will be asserted if there is such a crystal attached. If there is no crystal
present, both bits will be deasserted.
22.3 RTC Persistent Register Copy Control
The copying of a persistent shadow register (digital) to persistent master storage (analog)
occurs automatically. This automatic write-back that occurs for each register as the copy
controller services writes to the shadow registers can lead to some very long timing loops
if efficient write procedures are not used. Writing all eight shadow registers can take several
milliseconds to complete. Do not attempt to write to more than one shadow register
immediately before power down. Whenever possible, software should ensure that the
HW_RTC_STAT_NEW_REGS field is 0 before powering down the chip or setting the
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• If the HW_RTC_PERSISTENT0_CLOCKSOURCE bit is set to 0, these functions
• If the HW_RTC_PERSISTENT0_CLOCKSOURCE bit is 1 and the
• However, if the HW_RTC_PERSISTENT0_CLOCKSOURCE is 1 and the
operate on a clock domain derived from the 24.0-MHz crystal oscillator divided by 768
to yield 31.250 KHz.
HW_RTC_PERSISTENT0_XTAL32_FREQ bit is 0, then the optional external driving
crystal clock will be used and its frequency should be 32.768 KHz.
HW_RTC_PERSISTENT0_XTAL32_FREQ bit is also 1, then the external crystal
generated clock should be 32.000 KHz for correct operation.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.