MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1813

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
29.4.2.4 Modes of Operation
29.4.2.4.1 Frame Processing
The VLAN input processing function modifies the frames before they enter the switching
engine. This means, if a VLAN tag is inserted, the switch will only act on the inserted VLAN
tag (for example, priority) and any original tag that was found in the frame before the
modification, if any, has no effect within the switch.
In addition, if VLAN verification is enabled for a port (see register VLAN_VERIFY), the
VLAN-id used for insertion (SYSTEM_TAGINFOn) must also be configured in the global
VLAN resolution table (see register
to ensure the switch accepts frames, which contain the inserted tag.
When, in any of the modes, a tag is inserted, it is always inserted as first tag (outer) and its
information field is set as programmed in the SYSTEM_TAGINFO0..2 register for the port
n where the frame is received.
29.4.2.4.2 Mode 1 -- Single Tagging with Passthrough
Insert Tag only if untagged frame, leave frame unmodified if tagged.
29.4.2.4.3 Mode 2 -- Single Tagging with Replace
If untagged, add the tag, if single tagged, overwrite the tag.
29.4.2.4.4 Mode 3 -- Double Tagging with Passthrough
Insert a tag on untagged and tagged. This results in a single tagged frame when an untagged
is received, and a double tagged frame, when a single tagged frame is received. When a
double tagged frame is received the frame is left unmodified.
Freescale Semiconductor, Inc.
• SYSTEM_TAGINFOn: 16 bit value. The VLAN information field (VLAN-ID and
• Mode of operation: There are different modes of operation, which define how incoming
priority) used for tag insertion operations.
frames must be processed for a port. The function can be enabled and configured
individually per port: See registers
If the vlan input processing function is not enabled
(VLAN_IN_MODE_ENA bit of the port=0), the mode setting
has no effect.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
VLAN_RES_TABLE_0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
VLAN_IN_MODE_ENA
Note
to VLAN_RES_TABLE_31),
and VLAN_IN_MODE.
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