MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1123

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Address:
Freescale Semiconductor, Inc.
Reset
Reset
REFRESH_
AREFRESH
Bit
Bit
W
W
R
R
RSVD4
RSVD3
RSVD2
AUTO_
MODE
31 25
23 17
Field
15 9
24
16
31
15
0
0
HW_DRAM_CTL17
30
14
0
0
Always write zeroes to this field.
Define auto-refresh to occur at next burst or next cmd boundary.
Sets the mode for when the automatic refresh will occur. If the auto_refresh_mode parameter is set and a
refresh is required to memory, the EMI will delay this refresh until the end of the current transaction (if the
transaction is fully contained inside a single page), or until the current transaction hits the end of the current
page.
'b0 = Issue refresh on the next DRAM burst boundary, even if the current command is not complete.
'b1 = Issue refresh on the next command boundary.
Always write zeroes to this field.
Trigger auto-refresh at boundary specified by AUTO_REFRESH_MODE. WRITE-ONLY
Initiates an automatic refresh to the DRAM devices based on the setting of the auto_refresh_mode parameter.
If there are any open banks when this parameter is set, the EMI will automatically close these banks before
issuing the auto-refresh command. This parameter will always read back as 0x0.
'b0 = No action
'b1 = Issue refresh to the DRAM devices
Always write zeroes to this field.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
RSVD4
RSVD2
28
12
0
0
800E_0000h base + 44h offset = 800E_0044h
HW_DRAM_CTL17 field descriptions
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
23
0
0
7
22
0
0
6
Chapter 14 External Memory Interface (EMI)
21
0
5
0
RSVD3
RSVD1
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
A R E F R E S H
1123
16
0
0
0

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