MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1150

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
14.8.46 DRAM Control Register 50 (HW_DRAM_CTL50)
This is a DRAM configuration register.
Address:
1150
Reset
Reset
CURRENT_BDW
AXI1_BDW_
AXI1_BDW
PRIORITY
Bit
Bit
OVFLOW
W
W
AXI0_R_
R
R
RSVD4
RSVD3
RSVD2
RSVD1
30 24
23 17
AXI1_
Field
Field
14 8
2 0
7 2
RSVD4
RSVD2
31
16
15
31
15
0
0
HW_DRAM_CTL50
30
14
0
0
Priority of read cmds from AXI port 0.
Always write zeroes to this field.
Current bandwidth usage percentage for port 1. READ-ONLY.
Always write zeroes to this field.
Port 1 behavior when bandwidth maximized.
Always write zeroes to this field.
Maximum bandwidth percentage for port 1.
Always write zeroes to this field.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_DRAM_CTL49 field descriptions (continued)
AXI1_CURRENT_BDW
28
12
0
0
AXI1_BDW
800E_0000h base + C8h offset = 800E_00C8h
HW_DRAM_CTL50 field descriptions
27
11
0
0
26
10
0
0
25
0
0
9
24
0
0
8
Description
Description
23
0
0
7
22
0
0
6
21
0
5
0
RSVD1
RSVD3
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
AXI1_FIFO_
TYPE_REG
17
0
0
1
16
0
0
0

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