MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 466

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
6.5.92 APBH DMA channel 12 Current Command Address Register
The APBH DMA channel 12 current command address register points to the multiword
command that is currently being executed. Commands are threaded on the command address.
APBH DMA channel 12 is controlled by a variable sized command structure. This register
points to the command structure currently being executed.
Address:
Re-
6.5.93 APBH DMA channel 12 Next Command Address Register
The APBH DMA channel 12 next command address register points to the next multiword
command to be executed. Commands are threaded on the command address. Set CHAIN
to one to process command lists.
APBH DMA channel 12 is controlled by a variable sized command structure. Software
loads this register with the address of the first command structure to process and increments
the channel 12 semaphore to start processing. This register points to the next command
structure to be executed when the current command is completed.
Address:
Re-
466
set
set
Bit
Bit
W
W
R
R
CMD_ADDR
31
31
0
0
Field
31 0
30
30
0
0
29
29
0
0
(HW_APBH_CH12_CURCMDAR)
(HW_APBH_CH12_NXTCMDAR)
HW_APBH_CH12_CURCMDAR 8000_4000h base + 640h offset = 8000_4640h
HW_APBH_CH12_NXTCMDAR 8000_4000h base + 650h offset = 8000_4650h
28
28
0
0
Pointer to command structure currently being processed for channel 12.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
HW_APBH_CH12_CURCMDAR field descriptions
24
24
0
0
23
23
0
0
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
CMD_ADDR
0
CMD_ADDR
0
16
16
0
0
15
15
0
0
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
Freescale Semiconductor, Inc.
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
0
0
0
0