DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1011

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(3)
This is a 8-bit read/write register that affects Tx-Trigger Time (TTT) of Mailbox-30. The TTT of
Mailbox-30 is compared with CYCTR after RFTROFF extended with sign is added to the TTT.
However, the value of TTT is not modified. The offset value doesn't affect others except Mailbox-
30.
• RFTROFF (Address = H'086)
Bits 15 to 8 — Indicate the value of Reference Trigger Offset.
Bits 7 to 0: Reserved. The written value should always be ‘0’ and the returned value is ‘0’.
Bit15
0
0
0
.
0
.
1
1
.
1
1
Initial value:
Reference Trigger Offset Register (RFTROFF)
R/W:
Bit:
Bit14
0
0
0
.
1
.
1
1
.
0
0
R/W
15
0
R/W
14
Bit13
0
0
0
.
1
.
1
1
.
0
0
0
R/W
13
0
Bit12
0
0
0
.
1
.
1
1
.
0
0
RFTROFF[7:0]
R/W
12
0
R/W
11
0
Bit11
0
0
0
.
1
.
1
1
.
0
0
R/W
10
0
Bit10
0
0
0
.
1
.
1
1
.
0
0
R/W
9
0
R/W
8
0
Bit9
0
0
1
.
1
.
1
1
.
0
0
Section 19 Controller Area Network (RCAN-TL1)
R
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 979 of 1650
R
6
0
Bit8
0
1
0
.
1
.
1
0
.
1
0
-
R
5
0
-
Description
Ref_trigger_offset = +0
(initial value)
Ref_trigger_offset = +1
Ref_trigger_offset = +2
Ref_trigger_offset = +127
Ref_trigger_offset = −1
Ref_trigger_offset = −2
Ref_trigger_offset = −127
Prohibited
R
4
0
-
R
3
0
-
REJ09B0313-0300
R
2
0
-
R
1
0
-
R
0
0
-