DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 149

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5.2
Counting by the WDT does not proceed if the frequency divisor is changed but the multiplier is
not.
1. In the initial state, IFC = B'0 and PFC[2:0] = B'011.
2. Set the desired value in the IFC and PFC2 to IFC0 bits. The values that can be set are limited
3. After the register bits (IFC and PFC2 to PFC0) have been set, the clock is supplied of the new
Notes: 1. When executing the SLEEP instruction after the frequency has been changed, be sure
by the clock operating mode and the multiplication rate of PLL circuit. Note that if the wrong
value is set, this LSI will malfunction.
division ratio.
2. When the frequency-multiplier of the PLL circuit is changed and while oscillation is
Changing the Division Ratio
to read the frequency control register (FRQCR) three times before executing the
SLEEP instruction.
settling after exit from software standby mode, an unstable CKIO clock will be output
in clock mode 0, 1, or 3. Control bits 14, 13, and 12 in FRQCR to ensure that this
unstable CKIO clock does not lead to malfunctions.
Rev. 3.00 Sep. 28, 2009 Page 117 of 1650
Section 4 Clock Pulse Generator (CPG)
REJ09B0313-0300