DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1219

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(6)
Figure 23.8 shows an example of the SOFR interrupt output timing of this module. When the
frame number is updated or a damaged SOF packet is detected, the SOFR interrupt is generated.
The interrupt operation should be specified using the SOFRM bit in FRMNUM.
When the host controller function is selected, SOFRM = 1 should not be set.
1. When SOFRM = 0 is set
Note:
token reception
CTRT interrupts
(1) Setup stage completed
(2) Control read transfer status stage transition
(3) Control write transfer status stage transition
(4) Control transfer completed
(5) Control transfer sequence error
The SOFR interrupt is generated when the frame number is updated (intervals of
approximately 1 ms). Interrupts are generated by the internal interpolation function even if an
SOF packet is damaged or missing. During high-speed communication, interrupts are
generated at the timing at which the frame number is updated (intervals of approximately 1
ms).
Setup
Frame Update Interrupt
CTSQ = 000
setup stage
transmission
transmission
mission
trans-
ACK
ACK
Figure 23.7 Control Transfer Stage Transitions
ACK
Setup token reception
1
1
CTSQ = 001
CTSQ = 011
control write
control read
data stage
data stage
control transfer
sequence error
CTSQ = 110
OUT token
IN token
Section 23 USB 2.0 Host/Function Module (USB)
2
3
1
5
detection
Error
Rev. 3.00 Sep. 28, 2009 Page 1187 of 1650
CTSQ = 010
control read
CTSQ = 100
control write
CTSQ = 101
control write
status stage
status stage
status stage
no data
Error detection and IN token reception
mission
reception
reception
are valid at all stages in the box.
trans-
ACK
ACK
ACK
4
Setup token reception
REJ09B0313-0300
CTSQ = 000
4
idle stage