DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1282

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 24 LCD Controller (LCDC)
24.3.9
LDPR registers are for accessing palette data directly allocated (4 bytes × 256 addresses) to the
memory space. To access the palette memory, access the corresponding register among this
register group (LDPR00 to LDPRFF). Each palette register is a 32-bit register including three 8-bit
areas for R, G, and B. For details on the color palette specifications, see section 24.4.3, Color
Palette Specification.
Initial value:
Initial value:
Note: nn = H'00 to H'FF
Rev. 3.00 Sep. 28, 2009 Page 1250 of 1650
REJ09B0313-0300
Bit
31 to 24
23 to 0
R/W:
R/W:
Bit:
Bit:
PALDnn
Palette Data Registers 00 to FF (LDPR00 to LDPRFF)
R/W
31
15
15
R
-
-
-
Bit Name
⎯
PALDnn23
to PALDnn0
PALDnn
R/W
30
14
14
R
-
-
-
PALDnn
R/W
29
13
13
R
-
-
-
Initial
Value
⎯
⎯
PALDnn
R/W
28
12
12
R
-
-
-
PALDnn
R/W
27
11
11
R
-
-
-
R/W
R
R/W
PALDnn
R/W
26
10
10
R
-
-
-
PALDnn
Description
Reserved
Palette Data
Bits 18 to 16, 9, 8, and 2 to 0 are reserved within each
RGB palette and cannot be set. However, these bits
can be extended according to the upper bits.
R/W
25
R
9
9
-
-
-
PALDnn
R/W
24
R
8
-
-
8
-
PALDnn
PALDnn
R/W
R/W
23
23
7
-
7
-
PALDnn
PALDnn
R/W
R/W
22
22
6
-
6
-
PALDnn
PALDnn
R/W
R/W
21
21
5
5
-
-
PALDnn
PALDnn
R/W
R/W
20
20
4
4
-
-
PALDnn
PALDnn
R/W
R/W
19
19
3
-
3
-
PALDnn
PALDnn
R/W
R/W
18
18
2
-
2
-
PALDnn
PALDnn
R/W
R/W
17
17
1
-
1
-
PALDnn
PALDnn
R/W
R/W
16
16
0
-
0
-