DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1270

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 24 LCD Controller (LCDC)
Table 24.3 I/O Clock Frequency and Clock Division Ratio
Note: Any setting other than above is handled as a clock division ratio of 1/1 (initial value).
Rev. 3.00 Sep. 28, 2009 Page 1238 of 1650
REJ09B0313-0300
DCDR[5:0]
000001
000010
000011
000100
000110
001000
001100
010000
011000
100000
Bit
13, 12
11 to 9
8
7, 6
5 to 0
Bit Name
ICKSEL[1:0] 00
DCDR[5:0]
Clock Division
Ratio
1/1
1/2
1/3
1/4
1/6
1/8
1/12
1/16
1/24
1/32
Initial
Value
All 0
1
All 0
000001 R/W
R/W
R/W
R
R
R
50.000
50.000
25.000
16.667
12.500
8.333
6.250
4.167
3.125
2.083
1.563
Description
Input Clock Select
Set the clock source for DOTCLK.
00: Bus clock is selected
01: Peripheral clock is selected
10: External clock is selected
11: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
These bits are always read as 0. The write value should
always be 0.
Clock Division Ratio
Set the input clock division ratio. For details on the
setting, see table 24.3.
I/O Clock Frequency (MHz)
60.000
60.000
30.000
20.000
15.000
10.000
7.500
5.000
3.750
2.500
1.875
66.000
66.000
33.000
22.000
16.500
11.000
8.250
5.500
4.125
2.750
2.063

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