DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 765

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bit
6
5
Bit Name
RIE
TE
Initial
Value
0
0
R/W
R/W
R/W
Description
Receive Interrupt Enable
Enables or disables the receive FIFO data full (RXI)
interrupts requested when the RDF flag or DR flag in
serial status register (SCFSR) is set to1, receive-error
(ERI) interrupts requested when the ER flag in SCFSR
is set to1, and break (BRI) interrupts requested when
the BRK flag in SCFSR or the ORER flag in line status
register (SCLSR) is set to1.
0: Receive FIFO data full interrupt (RXI), receive-error
1: Receive FIFO data full interrupt (RXI), receive-error
Note:
Transmit Enable
Enables or disables the serial transmitter.
0: Transmitter disabled
1: Transmitter enabled*
Note:
Section 15 Serial Communication Interface with FIFO (SCIF)
interrupt (ERI), and break interrupt (BRI) requests
are disabled
interrupt (ERI), and break interrupt (BRI) requests
are enabled*
*
*
RXI interrupt requests can be cleared by
reading the DR or RDF flag after it has
been set to 1, then clearing the flag to 0, or
by clearing RIE to 0. ERI or BRI interrupt
requests can be cleared by reading the ER,
BR or ORER flag after it has been set to 1,
then clearing the flag to 0, or by clearing
RIE and REIE to 0.
Serial transmission starts after writing of
transmit data into SCFTDR. Select the
transmit format in SCSMR and SCFCR and
reset the transmit FIFO before setting TE to
1.
Rev. 3.00 Sep. 28, 2009 Page 733 of 1650
REJ09B0313-0300

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