DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1296

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 24 LCD Controller (LCDC)
24.3.19 LCDC Control Register (LDCNTR)
LDCNTR specifies start and stop of display by the LCDC.
When 1s are written to the DON2 bit and the DON bit, the LCDC starts display. Turn on the LCD
module following the sequence set in the LDPMMR and LDPSPR. The sequence ends when the
LPS[1:0] value changes from B'00 to B'11. Do not make any action to the DON bit until the
sequence ends.
When 0 is written to the DON bit, the LCDC stops display. Turn off the LCD module following
the sequence set in the LDPMMR and LDPSPR. The sequence ends when the LPS[1:0] value
changes from B'11 to B'00. Do not make any action to the DON bit until the sequence ends.
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1264 of 1650
REJ09B0313-0300
Bit
15 to 5
4
3 to 1
R/W:
Bit:
15
R
0
-
Bit Name
⎯
DON2
⎯
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
All 0
12
R
0
-
11
R
0
-
R/W
R
R/W
R
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Display On 2
Specifies the start of the LCDC display operation.
0: LCDC is being operated or stopped
1: LCDC starts operation
When this bit is read, always read as 0. Write 1 to this
bit only when starting display. If a value other than 0 is
written when starting display, the operation is not
guaranteed. When 1 is written to, it resumes
automatically to 0. Accordingly, this bit does not need to
be cleared by writing 0.
Reserved.
These bits are always read as 0. The write value should
always be 0.
R
9
0
-
R
8
0
-
R
7
0
-
R
6
0
-
R
5
0
-
DON2
R/W
4
0
R
3
0
-
R
2
0
-
R
1
0
-
DON
R/W
0
0