DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 601

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(i)
In complementary PWM mode, the initial output is determined by the setting of bits OLSN and
OLSP in timer output control register 1 (TOCR1) or bits OLS1N to OLS3N and OLS1P to OLS3P
in timer output control register 2 (TOCR2).
This initial output is the PWM pulse non-active level, and is output from when complementary
PWM mode is set with the timer mode register (TMDR) until TCNT_4 exceeds the value set in
the dead time register (TDDR). Figure 11.44 shows an example of the initial output in
complementary PWM mode.
An example of the waveform when the initial PWM duty value is smaller than the TDDR value is
shown in figure 11.45.
Negative phase
Positive phase
Initial Output in Complementary PWM Mode
output
output
Figure 11.44 Example of Initial Output in Complementary PWM Mode (1)
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
Complementary
PWM mode
(TMDR setting)
Initial output
TGRA_4
TCNT_3, 4 value
TDDR
TCNT_3, 4 count start
(TSTR setting)
Active level
Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Dead time
Rev. 3.00 Sep. 28, 2009 Page 569 of 1650
TCNT_3
TCNT_4
Active level
REJ09B0313-0300
Time

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