DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 906

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 17 I
17.7.4
In master receive mode operation, set ACKBT before the falling edge of the 8th SCL cycle of the
last data being continuously transferred. Not doing so can lead to an overrun for the slave
transmission device.
17.7.5
When sequential bit-manipulation instructions are used to set the MST and TRS bits to select
master transmission in multi-master operation, a conflicting situation where AL in ICSR = 1 but
the mode is master transmit mode (MST = 1 and TRS = 1) may arise; this depends on the timing
of the loss of arbitration when the bit manipulation instruction for TRS is executed.
This can be avoided in either of the following ways.
• In multi-master operation, use the MOV instruction to set the MST and TRS bits.
• When arbitration is lost, check whether the MST and TRS bits are 0. If the MST and TRS bits
Rev. 3.00 Sep. 28, 2009 Page 874 of 1650
REJ09B0313-0300
have been set to a value other than 0, clear the bits to 0
Note on Setting ACKBT in Master Receive Mode
Note on the States of Bits MST and TRN when Arbitration Is Lost
2
C Bus Interface 3 (IIC3)