DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 434

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 10 Direct Memory Access Controller (DMAC)
10.3.2
The DMA destination address registers (DAR) are 32-bit readable/writable registers that specify
the destination address of a DMA transfer. During a DMA transfer, these registers indicate the
next destination address. When the data of an external device with DACK is transferred in single
address mode, DAR is ignored.
To transfer data in word (2-byte), longword (4-byte), or 16-byte unit, specify the address with 2-
byte, 4-byte, or16-byte address boundary respectively.
Initial value:
Initial value:
10.3.3
The DMA transfer count registers (DMATCR) are 32-bit readable/writable registers that specify
the number of DMA transfers. The transfer count is 1 when the setting is H'00000001, 16,777,215
when H'00FFFFFF is set, and 16,777,216 (the maximum) when H'00000000 is set. During a DMA
transfer, these registers indicate the remaining transfer count.
The upper eight bits of DMATCR are always read as 0, and the write value should always be 0. To
transfer data in 16 bytes, one 16-byte transfer (128 bits) counts one.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 402 of 1650
REJ09B0313-0300
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
DMA Destination Address Registers (DAR)
DMA Transfer Count Registers (DMATCR)
R/W
R/W
R/W
31
15
31
15
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
30
14
30
14
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
29
13
29
13
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
28
12
28
12
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
27
11
27
11
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
26
10
26
10
R
0
0
0
0
-
-
-
-
R/W
R/W
R/W
25
25
R
0
9
0
0
9
0
-
-
-
-
R/W
R/W
R/W
24
24
R
0
8
0
0
8
0
-
-
-
-
R/W
R/W
R/W
R/W
23
23
0
7
0
0
7
0
-
-
-
-
R/W
R/W
R/W
R/W
22
22
0
6
0
0
6
0
-
-
-
-
R/W
R/W
R/W
R/W
21
21
0
5
0
0
5
0
-
-
-
-
R/W
R/W
R/W
R/W
20
20
0
4
0
0
4
0
-
-
-
-
R/W
R/W
R/W
R/W
19
19
0
3
0
0
3
0
-
-
-
-
R/W
R/W
R/W
R/W
18
18
0
2
0
0
2
0
-
-
-
-
R/W
R/W
R/W
R/W
17
17
0
1
0
0
1
0
-
-
-
-
R/W
R/W
R/W
R/W
16
16
0
0
0
0
0
0
-
-
-
-