DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 289

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
• CS1WCR, CS7WCR
Initial value:
Initial value:
Bit
5 to 2
1, 0
Bit
31 to 21
R/W:
R/W:
Bit:
Bit:
* To connect the burst ROM to the CS0 space and switch to burst ROM interface after
Bit Name
⎯
HW[1:0]
activation, set the TYPE[2:0] bits in CS0BCR after setting the burst number by the bits
20 and 21 and the burst wait cycle number by the bits16 and 17. Do not write 1 to the
reserved bits other than above bits.
31
15
Bit Name
⎯
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
00
Initial
Value
All 0
R/W
28
12
R
0
0
-
SW[1:0]
R/W
27
11
R
0
0
-
R/W
R
R/W
R/W
R
R/W
26
10
R
0
1
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Delay Cycles from RD, WEn Negation to Address, CS0
Negation
Specify the number of delay cycles from RD and WEn
negation to address and CS0 negation.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W
25
R
0
9
0
-
WR[3:0]
R/W
24
R
0
8
1
-
R/W
23
R
0
7
0
-
Rev. 3.00 Sep. 28, 2009 Page 257 of 1650
R/W
WM
22
R
0
6
0
-
Section 9 Bus State Controller (BSC)
21
R
R
0
5
0
-
-
R/W
BAS
20
R
0
4
0
-
19
R
R
0
3
0
-
-
REJ09B0313-0300
R/W
18
R
0
2
0
-
WW[2:0]
R/W
R/W
17
0
1
0
HW[1:0]
R/W
R/W
16
0
0
0