DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1085

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The AND/NAND flash memory controller (FLCTL) provides interfaces for an external AND-type
flash memory and NAND-type flash memory. To take measures for errors specific to flash
memory, the ECC-code generation function and error detection function are available.
Note: The flash memory using Multi Level Cell (MLC) technology is not supported by this LSI.
22.1
(1)
• Interface directly connectable to AND-type flash memory
• Read or write in sector units (512 + 16 bytes) and ECC processing executed
• Read or write in byte units
• Supports addresses for 2 Gbits and more by extension to 5-byte addresses
(2)
• Interface directly connectable to NAND-type flash memory
• Read or write in sector units (512 + 16 bytes) and ECC processing executed
• Read or write in byte units
• Supports addresses for 2 Gbits and more by extension to 5-byte addresses
An access unit of 2048 + 64 bytes, referred to as a page, is used in some datasheets for AND-
type flash memory. In this manual, an access unit of 512 + 16 bytes, referred to as a sector, is
always used. For products in which 2048 + 64 bytes is referred to as a page, a page is divided
into units of 512 + 16 bytes (i.e. four sectors per page) for processing.
An access unit of 2048 + 64 bytes, referred to as a page, is used in some datasheets for NAND-
type flash memory. In this manual, an access unit of 512 + 16 bytes, referred to as a sector, is
always used. For products in which 2048 + 64 bytes is referred to as a page, a page is divided
into units of 512 + 16 bytes (i.e. four sectors per page) for processing.
AND-Type Flash Memory Interface
NAND-Type Flash Memory Interface
Section 22 AND/NAND Flash Memory Controller
Features
(FLCTL)
Section 22 AND/NAND Flash Memory Controller (FLCTL)
Rev. 3.00 Sep. 28, 2009 Page 1053 of 1650
REJ09B0313-0300