DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 556

Manufacturer Part Number

DS72030W200FPV

MPU, 32BIT, SH7203, ROMLESS, 240QFP

Manufacturer

Renesas Electronics America

Program Memory Size

Digital Ic Case Style

Supply Voltage Range

1.1V To 1.3V

Operating Temperature Range

-20Â°C To +85Â°C

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)

Immediately after a reset, the MTU2’s TCNT counters are all designated as free-running counters.

When the relevant bit in TSTR is set to 1 the corresponding TCNT counter starts up-count

operation as a free-running counter. When TCNT overflows (from H'FFFF to H'0000), the TCFV

bit in TSR is set to 1. If the value of the corresponding TCIEV bit in TIER is 1 at this point, the

MTU2 requests an interrupt. After overflow, TCNT starts counting up again from H'0000.

Figure 11.5 illustrates free-running counter operation.

When compare match is selected as the TCNT clearing source, the TCNT counter for the relevant

channel performs periodic count operation. The TGR register for setting the period is designated

as an output compare register, and counter clearing by compare match is selected by means of bits

CCLR0 to CCLR2 in TCR. After the settings have been made, TCNT starts up-count operation as

a periodic counter when the corresponding bit in TSTR is set to 1. When the count value matches

the value in TGR, the TGF bit in TSR is set to 1 and TCNT is cleared to H'0000.

If the value of the corresponding TGIE bit in TIER is 1 at this point, the MTU2 requests an

interrupt. After a compare match, TCNT starts counting up again from H'0000.

Rev. 3.00 Sep. 28, 2009 Page 524 of 1650

REJ09B0313-0300

Free-Running Count Operation and Periodic Count Operation:

Figure 11.5 Free-Running Counter Operation