DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 773

no-image

DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Bit
2
Bit Name
PER
Initial
Value
0
R/W
R
Section 15 Serial Communication Interface with FIFO (SCIF)
Description
Parity Error Indication
Indicates a parity error in the data read from the next
receive FIFO data register (SCFRDR) in
asynchronous mode.
0: No receive parity error occurred in the next data
[Clearing conditions]
1: A receive parity error occurred in the next data read
[Setting condition]
read from SCFRDR
from SCFRDR
PER is cleared to 0 when the chip undergoes a
power-on reset
PER is cleared to 0 when no parity error is present
in the next data read from SCFRDR
PER is set to 1 when a parity error is present in
the next data read from SCFRDR
Rev. 3.00 Sep. 28, 2009 Page 741 of 1650
REJ09B0313-0300

Related parts for DS72030W200FPV