DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1112

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 22 AND/NAND Flash Memory Controller (FLCTL)
22.3.12 Control Code FIFO Register (FLECFIFO)
FLECFIFO is used to read or write the control code FIFO area.
In DMA transfer, data in this register must be specified as the destination (source). When
transferring 16-byte DMA, access FLECFIFO from the address on the 16-byte address boundary.
Note that the direction of read or write specified by the SELRW bit in FLCMDCR must match
that specified in this register. When changing the read/write direction, FLECFIFO should be
cleared by setting the AC1CLR bit in FLINTDMACR before use.
Initial value:
Initial value:
Rev. 3.00 Sep. 28, 2009 Page 1080 of 1650
REJ09B0313-0300
Bit
31 to 0 ECFO[31:0] H'xxxxxxxx R/W
R/W:
R/W:
Bit:
Bit:
Bit Name
R/W
R/W
31
15
-
-
R/W
R/W
30
14
-
-
R/W
R/W
29
13
-
-
Initial
Value
R/W
R/W
28
12
-
-
R/W
R/W
27
11
-
-
R/W
R/W
R/W
26
10
-
-
Description
Control Code FIFO Area Read/Write Data
In write: Data is written to the control code FIFO area.
In read: Data in the control code FIFO area is read.
R/W
R/W
25
9
-
-
R/W
R/W
ECFO[31:16]
ECFO[15:0]
24
8
-
-
R/W
R/W
23
7
-
-
R/W
R/W
22
6
-
-
R/W
R/W
21
5
-
-
R/W
R/W
20
4
-
-
R/W
R/W
19
3
-
-
R/W
R/W
18
2
-
-
R/W
R/W
17
1
-
-
R/W
R/W
16
0
-
-

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