DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 30

• Manufacturer Part Number: DS72030W200FPV
• Description: MPU, 32BIT, SH7203, ROMLESS, 240QFP
• Manufacturer: Renesas Electronics America
• Series: SH7200r

Specifications of DS72030W200FPV

• Core Size: 32bit
• Program Memory Size: 32KB
• Cpu Speed: 200MHz
• Digital Ic Case Style: QFP
• No. Of Pins: 240
• Supply Voltage Range: 1.1V To 1.3V
• Operating Temperature Range: -20°C To +85°C
• Svhc: No SVHC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 28 Power-Down Modes ......................................................................1397
28.1 Features............................................................................................................................ 1397
28.2 Register Descriptions ....................................................................................................... 1400
28.3 Operation ......................................................................................................................... 1423
28.4 Usage Notes ..................................................................................................................... 1434
Section 29 User Debugging Interface (H-UDI)...............................................1437
29.1 Features............................................................................................................................ 1437
29.2 Input/Output Pins............................................................................................................. 1438
29.3 Register Descriptions ....................................................................................................... 1439
29.4 Operation ......................................................................................................................... 1441
Rev. 3.00 Sep. 28, 2009 Page xxviii of xxx
REJ09B0313-0300
28.1.1
28.2.1
28.2.2
28.2.3
28.2.4
28.2.5
28.2.6
28.2.7
28.2.8
28.2.9
28.2.10 Deep Standby Control Register (DSCTR) ........................................................ 1415
28.2.11 Deep Standby Control Register 2 (DSCTR2) ................................................... 1417
28.2.12 Deep Standby Cancel Source Select Register (DSSSR) ................................... 1418
28.2.13 Deep Standby Cancel Source Flag Register (DSFR) ........................................ 1420
28.2.14 Retention On-Chip RAM Trimming Register (DSRTR) .................................. 1422
28.3.1
28.3.2
28.3.3
28.3.4
28.3.5
28.4.1
28.4.2
28.4.3
29.3.1
29.3.2
29.4.1
29.4.2
29.4.3
29.4.4
Power-Down Modes ......................................................................................... 1397
Standby Control Register (STBCR).................................................................. 1401
Standby Control Register 2 (STBCR2)............................................................. 1402
Standby Control Register 3 (STBCR3)............................................................. 1403
Standby Control Register 4 (STBCR4)............................................................. 1405
Standby Control Register 5 (STBCR5)............................................................. 1407
Standby Control Register 6 (STBCR6)............................................................. 1409
System Control Register 1 (SYSCR1) .............................................................. 1410
System Control Register 2 (SYSCR2) .............................................................. 1412
System Control Register 3 (SYSCR3) .............................................................. 1413
Sleep Mode ....................................................................................................... 1423
Software Standby Mode.................................................................................... 1424
Software Standby Mode Application Example................................................. 1427
Deep Standby Mode.......................................................................................... 1428
Module Standby Function................................................................................. 1434
Notes on Writing to Registers........................................................................... 1434
Notice about Deep Standby Control Register 2 (DSCTR2).............................. 1434
Notice about Power-On Reset Exception Handling.......................................... 1435
Bypass Register (SDBPR) ................................................................................ 1439
Instruction Register (SDIR) .............................................................................. 1439
TAP Controller ................................................................................................. 1441
Reset Configuration .......................................................................................... 1442
TDO Output Timing ......................................................................................... 1442
H-UDI Reset ..................................................................................................... 1443