DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 179

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.9.4
Before exception handling begins running, the exception handling vector table must be stored in a
memory, and the CPU must be able to access the memory. So, if the exception handling is
generated
• Ex. 1: when the exception handling vector table is stored in an external address space, but the
• Ex. 2: when the exception handling vector table is stored in the on-chip RAM, but the vector
the CPU fetches an unintended value as the execution start address, and starts executing programs
from unintended address.
Note before Exception Handling Begins Running
settings of bus state controller and general I/O ports to access the external address space
have been not completed yet, or
base register (VBR) has been not changed to the on-chip RAM address yet,
Rev. 3.00 Sep. 28, 2009 Page 147 of 1650
Section 5 Exception Handling
REJ09B0313-0300

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