DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1408

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Section 26 I/O Ports
26.5
Port D is an input/output port with sixteen pins as shown in figure 26.4.
26.5.1
Table 26.7 lists the port D registers.
Table 26.7 Register Configuration
Rev. 3.00 Sep. 28, 2009 Page 1376 of 1650
REJ09B0313-0300
Register Name
Port D data register L
Port D port register L
Port D
Register Descriptions
Port D
PD15 (I/O) / D31 (I/O) / PINT7 (input) / ADTRG (input) / TIOC4D (I/O)
PD14 (I/O) / D30 (I/O) / PINT6 (input) / TIOC4C (I/O)
PD13 (I/O) / D29 (I/O) / PINT5 (input) / TEND1 (output) / TIOC4B (I/O)
PD12 (I/O) / D28 (I/O) / PINT4 (input) / DACK1 (output) / TIOC4A (I/O)
PD11 (I/O) / D27 (I/O) / PINT3 (input) / DREQ1 (input) / TIOC3D (I/O)
PD10 (I/O) / D26 (I/O) / PINT2 (input) / TEND0 (output) / TIOC3C (I/O)
PD9 (I/O) / D25 (I/O) / PINT1 (input) / DACK0 (output) / TIOC3B (I/O)
PD8 (I/O) / D24 (I/O) / PINT0 (input) / DREQ0 (input) / TIOC3A (I/O)
PD7 (I/O) / D23 (I/O) / IRQ7 (input) / SCS1 (I/O) / TCLKD (input) / TIOC2B (I/O)
PD6 (I/O) / D22 (I/O) / IRQ6 (input) / SSO1 (I/O) / TCLKC (input) / TIOC2A (I/O)
PD5 (I/O) / D21 (I/O) / IRQ5 (input) / SSI1 (I/O) / TCLKB (input) / TIOC1B (I/O)
PD4 (I/O) / D20 (I/O) / IRQ4 (input) / SSCK1 (I/O) / TCLKA (input) / TIOC1A (I/O)
PD3 (I/O) / D19 (I/O) / IRQ3 (input) / SCS0 (I/O) / DACK3 (output) / TIOC0D (I/O)
PD2 (I/O) / D18 (I/O) / IRQ2 (input) / SSO0 (I/O) / DREQ3 (input) / TIOC0C (I/O)
PD1 (I/O) / D17 (I/O) / IRQ1 (input) / SSI0 (I/O) / DACK2 (output) / TIOC0B (I/O)
PD0 (I/O) / D16 (I/O) / IRQ0 (input) / SSCK0 (I/O) / DREQ2 (input) / TIOC0A (I/O)
Abbreviation
PDDRL
PDPRL
Figure 26.4 Port D
R/W
R/W
R
Initial Value
H'xxxx
H'0000
Address
H'FFFE3982
H'FFFE399E
Access Size
8, 16
8, 16

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