DS72030W200FPV Renesas Electronics America, DS72030W200FPV Datasheet - Page 1413

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DS72030W200FPV

Manufacturer Part Number
DS72030W200FPV
Description
MPU, 32BIT, SH7203, ROMLESS, 240QFP
Manufacturer
Renesas Electronics America
Series
SH7200r
Datasheet

Specifications of DS72030W200FPV

Core Size
32bit
Program Memory Size
32KB
Cpu Speed
200MHz
Digital Ic Case Style
QFP
No. Of Pins
240
Supply Voltage Range
1.1V To 1.3V
Operating Temperature Range
-20°C To +85°C
Svhc
No SVHC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
26.6.2
PEDRL is a 16-bit readable/writable register that stores port E data. The PE15DR to PE0DR bits
correspond to the PE15/IOIS16/RTS3 to PE0/BS/RxD0/ADTRG pins, respectively.
When a pin function is general output, if a value is written to PEDRL, that value is output directly
from the pin, and if PEDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PEDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PEDRL, although that value is written into PEDRL, it
does not affect the pin state. Table 26.10 summarizes PEDRL read/write operation.
Initial value:
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R/W:
Bit:
PE15
R/W
Port E Data Registers L (PEDRL)
DR
15
0
Bit Name
PE15DR
PE14DR
PE13DR
PE12DR
PE11DR
PE10DR
PE9DR
PE8DR
PE7DR
PE6DR
PE5DR
PE4DR
PE3DR
PE2DR
PE1DR
PE0DR
PE14
R/W
DR
14
0
PE13
R/W
DR
13
0
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PE12
R/W
12
DR
0
PE11
R/W
DR
11
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PE10
R/W
DR
10
0
Description
See table 26.10.
R/W
PE9
DR
9
0
R/W
PE8
DR
8
0
R/W
PE7
DR
7
0
Rev. 3.00 Sep. 28, 2009 Page 1381 of 1650
R/W
PE6
DR
6
0
R/W
PE5
DR
5
0
R/W
PE4
DR
4
0
R/W
PE3
DR
3
0
Section 26 I/O Ports
REJ09B0313-0300
R/W
PE2
DR
2
0
R/W
PE1
DR
1
0
R/W
PE0
DR
0
0

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